Optimization Construction of Region Automaton

Model checking is one of the most practical techniques of automatic formal verification to ensure the correctness of design specifications. The problem that the number of states can become too large for model-checking real-time system is known as the state-space explosion problem. An optimization definition of clock equivalence, the key to model checking real-time, was described for model checking timed automaton in this paper. And then region automaton that the finite-state model resulted from timed automaton by Alur and Dill’s algorithm exist a lot of states which can't be reached or can be reached but useless, an improvement constructed algorithm to eliminate useless states during calculating clock region and time-successor by analyzing the clock constraint was given in this paper. The results suggest that reduction of the state space was efficient in new clock equivalent formulae and improved algorithm.